Xen Developer & Design Summit 2018 has ended

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Xen Developer & Design Summit 2018

09:00 GMT+07

Xen Project Weather Report 2018 - Lars Kurth, Xen Project / Citrix Jiangning, Level 2

09:35 GMT+07

Xen Project: Where Are We Going with x86? - George Dunlap, Citrix Systems R&D UK Ltd Jiangning, Level 2

10:10 GMT+07

Improving the security of QEMU as a device emulator in Xen - Paul Durrant, Citrix Systems Jiangning, Level 2

11:10 GMT+07

NVDIMM Overview - George Dunlap, Citrix Systems R&D UK Ltd Jiangning, Level 2

11:45 GMT+07

EPT-Based Sub-page Write Protection On Xenc - Yi Zhang, Intel Jiangning, Level 2

12:20 GMT+07

Intel Processor Trace for Xen Hypervisor - Luwei Kang, Intel Jiangning, Level 2

13:50 GMT+07

Design Session Announcements Jiangning, Level 2

09:00 GMT+07

Introducing ViryaOS: Secure Containers for Embedded and IoT - Stefano Stabellini, Aporeto Jiangning, Level 2

09:35 GMT+07

Windows PV Drivers Project: Status and Updates - Paul Durrant, Citrix Systems Jiangning, Level 2

10:10 GMT+07

The Art of Virtualizing Cache Maintenance - Julien Grall, Arm Jiangning, Level 2

09:00 GMT+07

Speculation and Response: Spectre, Meltdown, XPTI, and Panopticon - George Dunlap, Citrix Systems R&D UK Ltd Jiangning, Level 2

09:35 GMT+07

Unleashing the Power of Unikernels with Unikraft - Florian Schmidt, NEC Laboratories Europe GmbH Jiangning, Level 2

10:10 GMT+07

Xenwatch Multithreading - Dongli Zhang, Oracle Jiangning, Level 2